Advanced PCB Layout (Video) – Lesson 8 of Schematic & PCB Design Course
Lesson 8 from the Schematic & PCB Design Course which I have created for you. Enjoy!
PCB Layout Tips & Tricks, DDR2 / DDR3 Memory layout, Differential pair routing, Wide bus routing (PCI, ISA, ... ), Impedance calculation, Stackup design, CPU Fanouts and more. Software used for demonstration: Altium Designer.
PCB Layout Tips & Tricks, DDR2 / DDR3 Memory layout, Differential pair routing, Wide bus routing (PCI, ISA, ... ), Impedance calculation, Stackup design, CPU Fanouts and more. Software used for demonstration: Altium Designer.
Chapters:
- 00:00Introduction
- 01:37PCB Layout step 1: Memory Layout
- 02:38PCB Layout step 2: CPU fanouts – Powers, Decoupling capacitors
- 04:05PCB Layout step 2: CPU fanouts – Precise resistors / capacitors, Series resistors / capacitors,
- 05:25PCB Layout step 2: CPU fanouts – Crystals, Series resistors / capacitors, Termination resistors,
- 06:25PCB Layout step 2: CPU fanouts – Pull UP/Down resitors, Bootstrap resistors
- 07:56PCB Layout step 3: Fanouts for other Difficult BGAs
- 08:52PCB Layout step 4: Route Big & Wide Buses (PCI, ISA, …), do all the fanouts in the way
- 13:54About using same topology for all signals from same bus / group
- 18:42Tip: At this stage, do not worry how the tracks look
- 19:40Tip: Always use wider power tracks
- 20:58Tip: At this stage, do not worry about small violations, fix big violations
- 22:31Bonus time – DDR2 & DDR3 layout difference
- 30:21PCB Layout step 5: Differential pair routing
- 39:45PCB Layout step 6: Connect Long Length Buses, then High pin number buses and
- 41:23PCB Layout step 7: Local connections – Power supplies, Small circuits, Connectors
- 42:23Tip: Pick up a corner and work systematically
- 44:14PCB Layout step 7: Local connections – Analog areas
- 44:44Bonus – Where to download DDR2 & DDR3 Layout examples
- 45:39PCB Layout step 7: Connect rest of unconnected signals (1 wire nets, LEDs, …)
- 46:25PCB Layout step 8 (or Step 0): Connect Power nets
- 50:36PCB Layout step 9: To clear DRC
- 51:37About Impedances
- 57:36Impedance calculation
- 1:01:55Stackup
- 1:06:50Summary
- 1:08:22End
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