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Interfacing FPGAs with DDR Memory - Phil's Lab #115

How to determine FPGA pin-out of DDR interface, connect FPGA to DDR memory module, using Vivado and Memory Interface Generator (MIG) tools (Spartan-7). Including schematic and PCB design tips.
Chapters:
  • 00:00Introduction
  • 00:44Xerxes Rev B Hardware
  • 02:00Previous Videos
  • 03:47Hardware Overview
  • 06:10Vivado & MIG
  • 08:06Choosing Memory Module
  • 10:00DDR2 Memory Module Schematic
  • 12:31FPGA Banks
  • 15:37DDR Pin-Out
  • 17:53Verify Pin-Out
  • 18:51Additional Constraints
  • 21:40Termination & Pull-Down Resistors
  • 22:52PCB Tips
  • 25:55Future Video
  • 26:16Outro