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oguzgencer , 01-24-2022, 08:16 AM

Hi Robert,

I am curious about something which I want to learn if it is recommended or not in schematic designs.

I created the schematic in your Altium essentials second edition course. In the schematic, there are some power nets that I wanted to use netlabel instead of drawing the line as attachments. The OUT1 pin of the chip is connected to both the voltage divider circuit and to the OUTPUT 1 Circuit. I want to make these connections with the netlabel which I can name as "OUT1". However, the net is also connected to the "+1V5" power port. So if I make a netlabel named "OUT1", does it make any problem in compiling? Is that a recommended structure? If not, what are the recommended methods in such situations?

Thanks,

Oğuz

qdrives , 01-24-2022, 02:17 PM

@oguzgencer Better start a new topic for this next time.
What is the function of the net? The name should 'describe' the function.
Good practice -> do NOThave multiple names for a net.

robertferanec , 01-28-2022, 07:34 AM

I agree with @qdrives - do not use multiple names on one net. It works in some systems, but it is not a good practice.