mairomaster , 02-10-2017, 02:09 AM
For such a small pitch and pad count you will need micro vias. If you don't want to use such for you project (maybe you can do without apart from this package) maybe you want to chose a bigger pitch IC or a different package.
The outermost pads you can just route on the top layer. The second row will go to the first internal layer with micro vias. Depending on how many of the 3rd row signals you need to fan out, you might need another internal signal layer and more micro vias. Your stack could look like this:
L1 - Top
L2 - GND plane
L3 - Internal Layer 1
L4 - Internal Layer 2
In this case you will need micro vias between L1 - L2 and L2 - L3. As already said, you might also need to go L3 - L4 if you need most of the signals on the 3rd row of pads (PD, HPD, REXT, etc). I think you might be alright without this though - so 2 micro via drill pairs in the best case.
Another trick that is convenient to use in such situation is to route the 3rd row of pads on L3 as well. That could be done based on the fact that you can choose the size of the micro vias, so that they can be smaller than the BGA pads. For example if you go with 0.275 micro via (if you can), that will give you 0.225 space between the micro via pads on L3. Then if you use 0.075 track width (just to do the fan out - you can increase it after that), it will be enough to go in between the micro via pads, leaving you a clearance of 0.075. If you need to do all of these, you first need to speak to your manufacturer capabilities though. This is demonstrated on the following picture (they used micro vias in pad, you don't necessarily need to do that):