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Pad Clearance Constraint Confirmation

NotSoFast , 01-05-2025, 01:59 PM
Hello. Having a rule violation issue with clearance constraint on a part that matches the land pattern given by the manufacture. I plan on having the board produced by PCB Way.
Am I correct in interpreting that the pad to pad clearance capability at PCBWay is recommended 0.15 mm?
https://www.pcbway.com/pcb_prototype/PCB_Manufacturing_tolerances.html

The design rule I modified in Altium is: SMD Pad under Clearance.
NotSoFast , 01-05-2025, 02:12 PM
What's a good rule of thumb value for solder mask expansion?
QDrives , 01-05-2025, 04:48 PM
What copper thickness do you use?
QDrives , 01-05-2025, 04:50 PM
That depends. There are many fabricators that will want you to specify 0 and let them adjust it.
However, I have used 0.05mm in the past and go to 0.03mm nowadays. However, that can only be done with LDI.
https://www.eurocircuits.com/pcb-design-guidelines/soldermask/
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