Errors doing PCB design during design rule check
Ivan_Mendez , 05-09-2021, 04:59 PM
I´m doing fedevel course of electronic design named Altium Essentials. I have just finishing lesson 4 but I can´t continue with lesson 5 because when I did design rule check at the end of the lesson 4, then appeared to me 59 errors Wich I don´t know how to fix them.
I attach a screen capture. What can I do to solve this situation an continue with lesson 5?
I attach a screen capture. What can I do to solve this situation an continue with lesson 5?
Ivan_Mendez , 05-10-2021, 01:48 PM
I fixed the errors by coorecting via hole from 0.6 mm to 0.3 mm. I think it happends because even I have defined rules on Vias definition when I selected via its diametre width was 0.6 mm and its hole was 0.6 mm instead of 0.3 mm. how can I set the vias dimension to work with them properly? I refer that I don´t want to define each via dimension each time that I selected one of them. Thanks.
qdrives , 05-13-2021, 09:53 AM
Have a look at via templates https://www.google.com/search?q=altium+via+template
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