FEDEVEL
Platform forum

PMICnewbie , 02-03-2025, 09:45 PM

No rats showing on Fiducials , is that normal?

QDrives , 02-03-2025, 11:15 PM

A fiducial should not be connected, so why would it be in the rats nest?

PMICnewbie , 02-04-2025, 02:19 AM

Rats and in design

PMICnewbie , 02-04-2025, 02:19 AM

Rats and Netlist errors in design

PMICnewbie , 02-04-2025, 02:23 AM

OK thanks the other issue is that my netlist is failing as naming is not being recognized as a legal character.like +5V_PVCC is changing to PLUS5V_PVCC.

Second; is inturn causing missing Rats in Allegro. and connections are getting avoided, how do I fix this @QDrives @Robert Feranec , Im following everything as the lesson,

rather than connecting to the pins or highlighting all the nets in the CIS, it avoids the connection and move around it, its like the Pin is unconnected. Kindly advice, it may have to do with the netlist I guess, how do I let it recognize + and other characters as in the warnings which is causing the netlist to fail

QDrives , 02-04-2025, 02:35 AM

I do not know OrCAD nor Allegro, but the net above the highlighted one, seem to be called +5V_...

PMICnewbie , 02-04-2025, 06:16 PM

Connectivity Issues in allegro and Netlist errors in design

PMICnewbie , 02-04-2025, 10:07 PM

It got solved, I had to reconnect wire in the schematic

PMICnewbie , 02-04-2025, 10:08 PM

Connectivity Issues in allegro and Netlist errors in design [SOLVED]

PMICnewbie , 02-04-2025, 10:15 PM

Connectivity Issues in allegro and Netlist errors in design

PMICnewbie , 02-04-2025, 10:17 PM

The warning is gone but still it doesnt connect the power pins , its missing the pins and going around them rather than clocking and connecting

PMICnewbie , 02-04-2025, 10:18 PM

QDrives , 02-04-2025, 10:32 PM

What if you start routing from the pad?

PMICnewbie , 02-04-2025, 10:48 PM

Thankyou it works but creates some constraint errors, hopefully as per robert may fix them as the lesson proceeds