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KA , 02-03-2025, 08:10 AM

Hi All,

I’m currently designing an Ethernet interface using the LAN8742AI and have a few questions regarding the PCB layout. According to the routing guidelines provided in the LAN8742 Routing Checklist (https://ww1.microchip.com/downloads/en/DeviceDoc/LAN8742_QFN_Rev_A_Routing_Checklist.pdf), it is recommended to remove all planes underneath the differential pairs between the port and the magnetics.

- A constraint in my design is that I cannot use a mag jack with integrated magnetics due to PCB limitations. In my 6-layer board design, the port and magnetics are placed on Layer 1. I’ve attempted to follow the guidelines by creating a keepout region under the differential pairs. Could you please review the attached PCB layout screenshot to confirm if this has been implemented correctly?

- I have set up the 100-ohm differential pair impedance traces using GND as the reference plane. However, I’m unsure how the impedance is affected in the keepout region where the reference plane is removed.

- I’m curious about the rationale behind the manufacturer’s recommendation for the keepout region. Wouldn’t a continuous GND plane beneath the traces help reduce noise? Any insights into this would be greatly appreciated.

Thank you for your time and assistance!

dangcaominh , 02-04-2025, 03:50 AM

https://www.youtube.com/watch?v=UZbt_-J6fWs
I thought this video already explained it?

Sniper2 , 02-04-2025, 05:23 AM

U have space for chokes but not for a rj45 with magnetics?

Sniper2 , 02-04-2025, 05:23 AM

With caps you will have short range ethernet

Sniper2 , 02-04-2025, 05:23 AM

I am not sure why you want to make that tradeoff

KA , 02-04-2025, 05:54 AM

I've got constraints on height and weight.

KA , 02-04-2025, 05:59 AM

By 'short range,' would this setup still work for a 1-meter cable? I don’t expect the cable length to exceed 1 meter.

Sniper2 , 02-04-2025, 09:38 AM

Yes

Sniper2 , 02-04-2025, 09:39 AM

Should still be able to find something try pulse transformers

KA , 02-04-2025, 11:35 AM

Thanks for sharing the video. I got my diff pair trace width and gap updated in the keepout region.